Certification in System-on-Chip Design and Emulation (Duration: 10 weeks)

• Motivation: The course is designed to extend students with system level and chip level training enabling them to appreciate designing a SoC from architecture through netlist sign-off
• Teachers: Experienced Engineers from industry teach the classes and guide on the lab work, and so prepare the students to enter the industry with full confidence, and be productive sooner than later.
• Eligibility (One of two below)
  1. B. Tech in electrical, electronic or computer engineering.
  2. Master of Science (MSc) with Electronics specialization
• Placement: Assist the students in placement in technology start-ups and MNCs. The students are required to pass the final test to be assisted in employment.
• Fee: Please contact and apply online to know the fee details.
• Students: CONTACT AND APPLY ONLINE
• Employers: Please email us at employer@krispan.com with your contact details and we will get back to you.

Structure
Total: 10 weeks

• 6 hours of lecture each week
• 8 hours of lab each week.

Course Overview:

• Anatomy of a System-on-Chip, and process flow.
• Chip Architecture – concepts, tradeoffs, DOs and DONTs.
• EDA Tools
• Logic Design Concepts
• Verilog Language for Design and Verification
• SoC Design
• SoC Verification
• Synthesis and Static Timing Analysis (STA)
• SoC Emulation
• Chip Front-end Sign-off Checks
• Projects – Design of a digital systems and its implementation on FPGA.

For more information on this training module please click on button below;

The current class registration is closed. We will be offering this class again, send request if you are interested in this training. Also, see our other Krispan Technical Training Classes Offered.

Please our training schedule to see upcoming classes or join our send us your training request.